Senior Logic Design Engineer
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תקציר
proteanTecs is a game-changing startup that's giving advanced electronics the power to report on their own health. In a digital world built for autonomous driving, cloud computing, and AI, we depend on computing systems daily. But how can we guarantee their safety, reliability and functionality?
דרישות
- B.Sc. or M.Sc. in Electrical or Computer Engineering
- 5+ years as a VLSI front-end engineer (logic/ASIC/chip design) or in a similar domain
- Strong background in RTL design, handoff methodologies, and signoff tools (Lint, CDC, RDC)
- Close familiarity with python, Git, Unix-like environment - an advantage
- Experience with low-power design techniques (clock gating, power domains, DVFS) - an advantage
- Knowledge of DFT design and flows - an advantage
- Self-driven — takes a task from definition to signoff, pulling in whoever is needed along the way
- Detail-oriented, with a sharp eye for issues others miss
- A clear communicator who can convey technical tradeoffs to cross-functional teams
- Curious about new design techniques and methodologies